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HD64F2149YV 데이터시트(PDF) 475 Page - Renesas Technology Corp

부품명 HD64F2149YV
상세설명  Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series
PDF  1075 Pages
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD64F2149YV 데이터시트(HTML) 475 Page - Renesas Technology Corp

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Section 15 Serial Communication Interface (SCI, IrDA)
Rev. 3.00 Jan 18, 2006 page 447 of 1044
REJ09B0280-0300
The BRR setting is found from the following equations.
Asynchronous mode:
N =
× 106 – 1
64
× 22n–1 × B
φ
Synchronous mode:
N =
× 106 – 1
8
× 22n–1 × B
φ
Where B: Bit rate (bits/s)
N: BRR setting for baud rate generator (0
≤ N ≤ 255)
φ: Operating frequency (MHz)
n: Baud rate generator input clock (n = 0 to 3)
(See the table below for the relation between n and the clock.)
SMR Setting
n
Clock
CKS1
CKS0
0
φ
00
1
φ/4
0
1
2
φ/16
1
0
3
φ/64
1
1
The bit rate error in asynchronous mode is found from the following equation:
× 106
Error (%) =
– 1
× 100
(N + 1)
× B × 64 × 22n–1
φ



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