HD64F2149YV datasheet(507/1075 Pages) RENESAS

507 / 1075 page

Section 15 Serial Communication Interface (SCI, IrDA)

Rev. 3.00 Jan 18, 2006 page 479 of 1044

REJ09B0280-0300

In serial transmission, the SCI operates as described below.

1. The SCI monitors the TDRE flag in SSR, and if it is 0, recognizes that data has been written to

TDR, and transfers the data from TDR to TSR.

2. After transferring data from TDR to TSR, the SCI sets the TDRE flag to 1 and starts

transmission. If the TIE bit is set to 1 at this time, a transmit-data-empty interrupt (TXI) is

generated.

When clock output mode has been set, the SCI outputs 8 serial clock pulses. When use of an

external clock has been specified, data is output synchronized with the input clock.

The serial transmit data is sent from the TxD pin starting with the LSB (bit 0) and ending with

the MSB (bit 7).

3. The SCI checks the TDRE flag at the timing for sending the MSB (bit 7).

If the TDRE flag is cleared to 0, data is transferred from TDR to TSR, and serial transmission

of the next frame is started.

If the TDRE flag is set to 1, the TEND flag in SSR is set to 1, the MSB (bit 7) is sent, and the

TxD pin maintains its state.

If the TEIE bit in SCR is set to 1 at this time, a transmit-end interrupt (TEI) request is

generated.

4. After completion of serial transmission, the SCK pin is held in a constant state.

Figure 15.17 shows an example of SCI operation in transmission.

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