HD64F2149YV datasheet(513/1075 Pages) RENESAS

부품명	HD64F2149YV

상세설명	Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series

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제조업체	RENESAS [Renesas Technology Corp]

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513 / 1075 page

Section 15 Serial Communication Interface (SCI, IrDA)

Rev. 3.00 Jan 18, 2006 page 485 of 1044

REJ09B0280-0300

When the serial data is 1, no pulse is output.

000

UART frame

IR frame

Data

Start

bit

Stop

bit

Start

bit

Stop

bit

Pulse width is 1.6 µs

to 3/16 bit interval

Transmission

Reception

Bit

interval

Figure 15.22 IrDA Transmit/Receive Operations

Reception: In reception, IR frame data is converted to a UART frame by the IrDA interface, and

input to the SCI.

When a high-level pulse is detected, 0 data is output, and if there is no pulse during a one-bit

interval, 1 data is output. Note that a pulse shorter than the minimum pulse width of 1.41 µs will

be identified as a 0 signal.

High-Level Pulse Width Selection: Table 15.12 shows possible settings for bits IrCKS2 to

IrCKS0 (minimum pulse width), and H8S/2169 or H8S/2149 operating frequencies and bit rates,

for making the pulse width shorter than 3/16 times the bit rate in transmission.

HD64F2149YV 데이터시트(PDF) 513 Page - Renesas Technology Corp