HD64F2149YV datasheet(519/1075 Pages) RENESAS

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HD64F2149YV 데이터시트(PDF) 519 Page - Renesas Technology Corp

부품명	HD64F2149YV

상세설명	Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series

PDF	1075 Pages

Scroll/Zoom	100%

제조업체	RENESAS [Renesas Technology Corp]

홈페이지	http://www.renesas.com

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519 / 1075 page

Section 15 Serial Communication Interface (SCI, IrDA)

Rev. 3.00 Jan 18, 2006 page 491 of 1044

REJ09B0280-0300

Restrictions on Use of DTC

• When an external clock source is used as the serial clock, the transmit clock should not be

input until at least 5

φ clock cycles after TDR is updated by the DTC. Misoperation may occur

if the transmit clock is input within 4 clock cycles after TDR is updated. (Figure 15.24)

• When RDR is read by the DTC, be sure to set the activation source to the relevant SCI receive-

data-full interrupt (RXI).

LSB

Serial data

SCK

Note: When operating on an external clock, set t > 4 states.

TDRE

Figure 15.24 Example of Synchronous Transmission by DTC

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