HD64F2149YV datasheet(626/1075 Pages) RENESAS

626 / 1075 page

Section 18A Host Interface X-Bus Interface (XBS)

Rev. 3.00 Jan 18, 2006 page 598 of 1044

REJ09B0280-0300

This state is maintained while the HIFSD pin is low, and when the HIFSD pin returns to the high-

level state, the pins are restored to their normal operation as host interface pins.

Table 18A.8 shows the scope of HIF pin shutdown.

Table 18A.8 Scope of HIF Pin Shutdown

Abbreviation

Port

Scope of

Shutdown in

Slave Mode

I/O

Selection Conditions

IOR

P93

Input

HI12E = 1

IOW

P94

Input

HI12E = 1

CS1

P95

Input

HI12E = 1

CS2

P81

∆

Input

HI12E = 1 and CS2E = 1 and FGA20E = 0

ECS2

P90

∆

Input

HI12E = 1 and CS2E = 1 and FGA20E = 1

CS3

PB2

∆

Input

HI12E = 1 and CS3E = 1

CS4

PB3

∆

Input

HI12E = 1 and CS4E = 1

HA0

P80

Input

HI12E = 1

HDB7 to

HDB0

P37 to

P30

I/O

HI12E = 1

HIRQ11

P43

∆

Output

HI12E = 1 and CS2E = 1 and P43DDR = 1

HIRQ1

P44

∆

Output

HI12E = 1 and P44DDR = 1

HIRQ12

P45

∆

Output

HI12E = 1 and P45DDR = 1

HIRQ3

PB0

∆

Output

HI12E = 1 and CS3E = 1 and PB0DDR = 1

HIRQ4

PB1

∆

Output

HI12E = 1 and CS4E = 1 and PB1DDR = 1

GA20

P81

∆

Output

HI12E = 1 and FGA20E = 1

HIFSD

P82

—

Input

HI12E = 1 and SDE = 1

Legend: O: Pins shut down by shutdown function

The

IRQ2/ADTRG input signal is also fixed in the case of P90 shutdown, the

TMCI1/HSYNCI signal in the case of P43 shutdown, and the TMRI/CSYNCI in the

case of P45 shutdown.

∆: Pins shut down only when the HIF:XBS function is selected by means of a register

setting

—: Pin not shut down

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