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HD64F2149YV 데이터시트(PDF) 687 Page - Renesas Technology Corp |
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HD64F2149YV 데이터시트(HTML) 687 Page - Renesas Technology Corp |
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687 / 1075 page ![]() Section 19 D/A Converter Rev. 3.00 Jan 18, 2006 page 659 of 1044 REJ09B0280-0300 19.3 Operation The D/A converter module has two built-in D/A converter circuits that can operate independently. D/A conversion is performed continuously whenever enabled by the D/A control register (DACR). When a new value is written in DADR0 or DADR1, conversion of the new value begins immediately. The converted result is output by setting the DAOE0 or DAOE1 bit to 1. An example of conversion on channel 0 is given next. Figure 19.2 shows the timing. • Software writes the data to be converted in DADR0. • D/A conversion begins when the DAOE0 bit in DACR is set to 1. After the elapse of the conversion time, analog output appears at the DA0 pin. The output value is AVref × (DADR value)/256. • This output continues until a new value is written in DADR0 or the DAOE0 bit is cleared to 0. • If a new value is written in DADR0, conversion begins immediately. Output of the converted result begins after the conversion time. • When the DAOE0 bit is cleared to 0, DA0 becomes an input pin. DADR0 write cycle DACR write cycle DADR0 write cycle DACR write cycle Address φ DADR0 DAOE0 DA0 Conversion data (1) Conversion data (2) High-impedance state Conversion result (1) Conversion result (2) t DCONV t DCONV t : D/A conversion time DCONV Figure 19.2 D/A Conversion (Example) |
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