HD64F2149YV datasheet(775/1075 Pages) RENESAS

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Section 24 Power-Down State

Rev. 3.00 Jan 18, 2006 page 747 of 1044

REJ09B0280-0300

Section 24 Power-Down State

24.1

Overview

In addition to the normal program execution state, the H8S/2169 or H8S/2149 has a power-down

state in which operation of the CPU and oscillator is halted and power dissipation is reduced.

Low-power operation can be achieved by individually controlling the CPU, on-chip supporting

modules, and so on.

The H8S/2169 or H8S/2149 operating modes are as follows:

1. High-speed mode

2. Medium-speed mode

3. Subactive mode

4. Sleep mode

5. Subsleep mode

6. Watch mode

7. Module stop mode

8. Software standby mode

9. Hardware standby mode

Of these, 2 to 9 are power-down modes. Sleep mode and subsleep mode are CPU modes, medium-

speed mode is a CPU and bus master mode, subactive mode is a CPU, bus master, and on-chip

supporting module mode, and module stop mode is an on-chip supporting module mode

(including bus masters other than the CPU). Certain combinations of these modes can be set.

After a reset, the MCU is in high-speed mode and module stop mode (excluding the DTC).

Table 24.1 shows the internal chip states in each mode, and table 24.2 shows the conditions for

transition to the various modes. Figure 24.1 shows a mode transition diagram.

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