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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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HD64F2149YV 데이터시트(PDF) 1005 Page - Renesas Technology Corp |
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HD64F2149YV 데이터시트(HTML) 1005 Page - Renesas Technology Corp |
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1005 / 1075 page  Appendix B Internal I/O Registers Rev. 3.00 Jan 18, 2006 page 977 of 1044 REJ09B0280-0300 HICR—Host Interface Control Register H'FFF0 HIF (XBS) 7 — 1 — — 6 — 1 — — 5 — 1 — — 4 — 1 — — 3 — 1 — — 0 FGA20E 0 R/W — 2 IBFIE2 0 R/W — 1 IBFIE1 0 R/W — Bit Initial value Slave R/W Host R/W Fast A20 gate function enable 0 1 HIF: XBS fast A20 gate function disabled HIF: XBS fast A20 gate function disabled Setting prohibited HIF: XBS fast A20 gate function enabled Input data register full interrupt enable 1 0 Input data register (IDR1) receive complete interrupt request is disabled 1 Input data register (IDR1) receive complete interrupt request is enabled Input data register full interrupt enable 2 0 Input data register (IDR2) receive complete interrupt request is disabled 1 Input data register (IDR2) receive complete interrupt request is enabled FGA20E 0 1 0 1 P81DDR Description |
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