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HD64F2149YV 데이터시트(PDF) 1016 Page - Renesas Technology Corp

부품명 HD64F2149YV
상세설명  Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series
PDF  1075 Pages
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
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Appendix B Internal I/O Registers
Rev. 3.00 Jan 18, 2006 page 988 of 1044
REJ09B0280-0300
TCONRS—Timer Connection Register S
H'FFFE
Timer Connection
7
TMRX/Y
0
R/W
6
ISGENE
0
R/W
5
HOMOD1
0
R/W
4
HOMOD0
0
R/W
3
VOMOD1
0
R/W
0
CLMOD0
0
R/W
2
VOMOD0
0
R/W
1
CLMOD1
0
R/W
Bit
Initial value
Read/Write
Clamp waveform mode select 1 and 0
CLMOD1 CLMOD0
0
1
0
1
0
1
0
1
0
1
0
1
Description
The CL1 signal is selected
The CL2 signal is selected
The CL3 signal is selected
The CL4 signal is selected
ISGENE
0
1
Vertical synchronization output mode select 1 and 0
VOMOD1 VOMOD0
0
1
0
1
0
1
0
1
0
1
0
1
Description
ISGENE
0
1
Horizontal synchronization output mode select 1 and 0
HOMOD1 HOMOD0
0
1
0
1
0
1
0
1
0
1
0
1
Description
The IHI signal (without 2fH modification) is selected
The IHI signal (with 2fH modification) is selected
The CL1 signal is selected
The IHG signal is selected
ISGENE
0
1
The IVI signal (without fall modification
or IHI synchronization) is selected
The IVI signal (without fall modification,
with IHI synchronization) is selected
The IVI signal (with fall modification,
without IHI synchronization) is selected
The IVI signal (with fall modification and
IHI synchronization) is selected
The IVG signal is selected
Internal synchronization signal select
TMRX/TMRY access select
0
The TMRX registers are accessed at addresses H'FFF0 to H'FFF5
1
The TMRY registers are accessed at addresses H'FFF0 to H'FFF5



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