| 전자부품 데이터시트 검색엔진 |
|
HD64F2149YV 데이터시트(PDF) 144 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
HD64F2149YV 데이터시트(HTML) 144 Page - Renesas Technology Corp |
|
144 / 1075 page ![]() Section 5 Interrupt Controller Rev. 3.00 Jan 18, 2006 page 116 of 1044 REJ09B0280-0300 IRQn interrupt request IRQnE IRQnF S R Q Clear signal Edge/level detection circuit IRQnSCA, IRQnSCB IRQn input Note: n: 7 to 0 Figure 5.3 Block Diagram of Interrupts IRQ7 to IRQ0 Figure 5.4 shows the timing of IRQnF setting. φ IRQn input pin IRQnF Figure 5.4 Timing of IRQnF Setting The vector numbers for IRQ7 to IRQ0 interrupt exception handling are 23 to 16. Detection of IRQ7 to IRQ0 interrupts does not depend on whether the relevant pin has been set for input or output. Therefore, when a pin is used as an external interrupt input pin, clear the corresponding DDR bit to 0 and do not use the pin as an I/O pin for another function. When IRQ6 pin is assigned as IRQ6 interrupt input pin, then clear the KMIMR6 bit to 0. When the IRQ7 pin is used as the IRQ7 interrupt input pin, bits KMIMR15 to KMIMR8 and WUEMRB7 to WUEMRB0 must all be set to 1. If any of these bits is cleared to 0, an IRQ7 interrupt input from the IRQ7 pin will be ignored. |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |