HD64F2149YV datasheet(270/1075 Pages) RENESAS

270 / 1075 page

Section 8 I/O Ports

Rev. 3.00 Jan 18, 2006 page 242 of 1044

REJ09B0280-0300

Selection Method and Pin Functions

P81/GA20/

CS2

The pin function is switched as shown below according to the combination of

bit HI12E in SYSCR2, bit CS2E in SYSCR, bit FGA20E in HICR, bit FGA20E

in HICR0, and bit P81DDR.

FGA20E

(LPC)

HI12E

—*

FGA20E

(XBS)

—

CS2E

—

——

P81DDR

0101

—

Pin function

P81

input

P81

output

P81

input

P81

output

CS2

input

P81

input

GA20

output

GA20

output

GA20 input pin

Note:

When bit FGA20E is set to 1 in HICR0, bits HI12E and P81DDR

should be cleared to 0.

The GA20 output pin and

CS2 input pin can only be used in mode 2 or 3

(EXPE = 0).

P80/HA0/

PME

The pin function is switched as shown below according to the combination of

bit HI12E in SYSCR2, bit PMEE in HICR0, and bit P80DDR.

PMEE

HI12E

—*

P80DDR

——*

Pin function

P80 input pin

P80 output pin

HA0 input pin

PME output pin

PME input pin

Note:

When bit PMEE is set to 1 in HICR0, bits HI12E and P80DDR

should be cleared to 0.

The HA0 input pin can only be used in mode 2 or 3 (EXPE = 0).

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