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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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HD64F2149YV 데이터시트(PDF) 279 Page - Renesas Technology Corp |
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HD64F2149YV 데이터시트(HTML) 279 Page - Renesas Technology Corp |
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279 / 1075 page  Section 8 I/O Ports Rev. 3.00 Jan 18, 2006 page 251 of 1044 REJ09B0280-0300 Port A Output Data Register (PAODR) Bit 7 6 543210 PA7ODR PA6ODR PA5ODR PA4ODR PA3ODR PA2ODR PA1ODR PA0ODR Initial value 0 0 000000 Read/Write R/W R/W R/W R/W R/W R/W R/W R/W PAODR is an 8-bit readable/writable register that stores output data for the port A pins (PA7 to PA0). PAODR can always be read or written to, regardless of the contents of PADDR. PAODR is initialized to H'00 by a reset and in hardware standby mode. It retains its prior state in software standby mode. Port A Input Data Register (PAPIN) Bit 7 6 543210 PA7PIN PA6PIN PA5PIN PA4PIN PA3PIN PA2PIN PA1PIN PA0PIN Initial value —* —* —* —* —* —* —* —* Read/Write R R RRRRRR Note: * Determined by the state of pins PA7 to PA0. Reading PAPIN always returns the pin states. |
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