HD64F2149YV datasheet(317/1075 Pages) RENESAS

317 / 1075 page

Section 9 8-Bit PWM Timers

Rev. 3.00 Jan 18, 2006 page 289 of 1044

REJ09B0280-0300

9.2.7

Port 2 Data Direction Register (P2DDR)

Bit

Initial value

Read/Write

P27DDR

P26DDR

P25DDR

P24DDR

P23DDR

P20DDR

P22DDR

P21DDR

P2DDR is an 8-bit write-only register that specifies the input/output direction and PWM output for

each pin of port 2 on a bit-by-bit basis.

Port 2 pins are multiplexed with pins PW8 to PW15. The bit corresponding to a pin to be used for

PWM output should be set to 1.

For details on P2DDR, see section 8.3, Port 2.

9.2.8

Port 1 Data Register (P1DR)

Bit

Initial value

Read/Write

P17DR

R/W

P16DR

R/W

P15DR

R/W

P14DR

R/W

P13DR

R/W

P10DR

R/W

P12DR

R/W

P11DR

R/W

P1DR is an 8-bit readable/writable register used to fix PWM output at 1 (when OS = 0) or 0 (when

OS = 1).

For details on P1DR, see section 8.2, Port 1.

9.2.9

Port 2 Data Register (P2DR)

Bit

Initial value

Read/Write

P27DR

R/W

P26DR

R/W

P25DR

R/W

P24DR

R/W

P23DR

R/W

P20DR

R/W

P22DR

R/W

P21DR

R/W

P2DR is an 8-bit readable/writable register used to fix PWM output at 1 (when OS = 0) or 0 (when

OS = 1).

For details on P2DR, see section 8.3, Port 2.

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