H8SXSLASH1663 datasheet(817/1158 Pages) RENESAS

817 / 1158 page

Section 16 USB Function Module (USB)

Rev.1.00 Jun. 07, 2006 Page 765 of 1102

REJ09B0294-0100

16.3.11

EP0o Data Register (EPDR0o)

EPDR0o is an 8-byte receive FIFO buffer for endpoint 0. EPDR0o holds endpoint 0 receive data

other than setup commands. When data is received successfully, EP0oTS in interrupt flag register

0 is set, and the number of receive bytes is indicated in the EP0o receive data size register. After

the data has been read, setting EP0oRDFN in the trigger register enables the next packet to be

received. This FIFO buffer can be initialized by means of BP0oCLR in the FCLR register.

Bit

Bit Name

Initial Value

R/W

Bit

Bit Name

Initial

Value

R/W

Description

7 to 0

D7 to D0

All 0

Data register for control-out transfer

16.3.12

EP0s Data Register (EPDR0s)

EPDR0s is an 8-byte FIFO buffer specifically for receiving endpoint 0 setup commands. Only the

setup command to be processed by the application is received. When command data is received

successfully, the SETUPTS bit in interrupt flag register 0 is set.

As a latest setup command must be received in high priority, if data is left in this buffer, it will be

overwritten with new data. If reception of the next command is started while the current command

is being read, command reception has priority, the read by the application is forcibly stopped, and

the read data is invalid.

Bit

Bit Name

Initial Value

R/W

Bit

Bit Name

Initial

Value

R/W

Description

7 to 0

D7 to D0

All 0

Data register for storing the setup command at the

control-out transfer

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