 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
H8SX/1663R 데이터시트(PDF) 1149 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
H8SX/1663R 데이터시트(HTML) 1149 Page - Renesas Technology Corp |
|
|
1149 / 1504 page  Section 25 Flash Memory Rev. 2.00 Sep. 24, 2008 Page 1117 of 1468 REJ09B0412-0200 25.7 Register Descriptions The flash memory has the following registers. Programming/Erasing Interface Registers: • Flash code control/status register (FCCS) • Flash program code select register (FPCS) • Flash erase code select register (FECS) • Flash key code register (FKEY) • Flash MAT select register (FMATS) • Flash transfer destination address register (FTDAR) Programming/Erasing Interface Parameters: • Download pass and fail result parameter (DPFR) • Flash pass and fail result parameter (FPFR) • Flash program/erase frequency parameter (FPEFEQ) • Flash multipurpose address area parameter (FMPAR) • Flash multipurpose data destination area parameter (FMPDR) • Flash erase block select parameter (FEBS) • RAM emulation register (RAMER) There are several operating modes for accessing the flash memory. Respective operating modes, registers, and parameters are assigned to the user MAT and user boot MAT. The correspondence between operating modes and registers/parameters for use is shown in table 25.3. |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
