H8SXSLASH1663R datasheet(1287/1504 Pages) RENESAS

1287 / 1504 page

Section 28 Power-Down Modes

Rev. 2.00 Sep. 24, 2008 Page 1255 of 1468

REJ09B0412-0200

28.2.8

Deep Standby Interrupt Edge Register (DPSIEGR)

DPSIEGR selects the rising or falling edge to clear deep software standby mode.

DPSIEGR is not initialized by the internal reset signal upon exit from deep software standby

mode.

Bit

Bit name

Initial value:

R/W:

DNMIEG

R/W



R/W



R/W



R/W

DIRQ3EG

R/W

DIRQ2EG

R/W

DIRQ1EG

R/W

DIRQ0EG

R/W

Bit

Bit Name

Initial

Value

R/W

Module

DNMIEG

R/W

NMI Edge Select

Selects the active edge for NMI pin input.

0: The interrupt request is generated by a falling edge.

1: The interrupt request is generated by a rising edge.

6 to 4



All 0

R/W

Reserved

These bits are always read as 0. The write value should

always be 0.

DIRQ3EG

R/W

IRQ3 Interrupt Edge Select

Selects the active edge for IRQ3-A pin input.

0: The interrupt request is generated by a falling edge.

1: The interrupt request is generated by a rising edge.

DIRQ2EG

R/W

IRQ2 Interrupt Edge Select

Selects the active edge for IRQ2-A pin input.

0: The interrupt request is generated by a falling edge.

1: The interrupt request is generated by a rising edge.

DIRQ1EG

R/W

IRQ1 Interrupt Edge Select

Selects the active edge for IRQ1-A pin input.

0: The interrupt request is generated by a falling edge.

1: The interrupt request is generated by a rising edge.

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