H8SXSLASH1663M datasheet(34/1504 Pages) RENESAS

34 / 1504 page

Section 1 Overview

Rev. 2.00 Sep. 24, 2008 Page 2 of 1468

REJ09B0412-0200

1.1.2

Overview of Functions

Table 1.1 lists the functions of these LSI products in outline.

Table 1.2 shows the comparison of support functions in each group.

Table 1.1

Overview of Functions

Classification

Module/

Function

Description

ROM

• ROM capacity: 1024 Kbytes, 512 Kbytes, or 384 Kbytes

Memory

RAM

• RAM capacity: 56 Kbytes or 40 Kbytes

CPU

• 32-bit high-speed H8SX CPU (CISC type)

Upwardly compatible for H8/300, H8/300H, and H8S CPUs at

object level

• General-register architecture (sixteen 16-bit general registers)

• Eleven addressing modes

• 4-Gbyte address space

Program: 4 Gbytes available

Data: 4 Gbytes available

• 87 basic instructions, classifiable as bit arithmetic and logic

instructions, multiply and divide instructions, bit manipulation

instructions, multiply-and-accumulate instructions, and others

• Minimum instruction execution time: 20.0 ns (for an ADD

instruction while system clock I

φ = 50 MHz and

CC = 3.0 to 3.6 V)

• On-chip multiplier (16 × 16 → 32 bits)

• Supports multiply-and-accumulate instructions

(16

× 16 + 42 → 42 bits)

CPU

Operating

mode

• Advanced mode

Normal, middle, or maximum mode is not supported.

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