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M32C/86 데이터시트(PDF) 342 Page - Renesas Technology Corp |
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M32C/86 데이터시트(HTML) 342 Page - Renesas Technology Corp |
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342 / 505 page ![]() Page 319 9 7 4 f o 5 0 0 2 , 8 0 . p e S 0 0 . 1 . v e R 0 0 1 0 - 4 0 2 0 B 9 0 J E R 23. CAN Module ) T 6 8 / C 2 3 M , 6 8 / C 2 3 M ( p u o r G 6 8 / C 2 3 M 23.1.1.1 RESET1 and RESET0 Bits When both RESET1 and RESET0 bits are set to "1" (CAN module reset), the CAN module is imme- diately initialized regardless of ongoing CAN communication. After the RESET1 and RESET0 bits are set to "1" and the CAN module reset is completed, the CiTSR register (i=0, 1) is set to "000016". The CiTEC and CiREC registers are set to "0016" and the STATE_ERRPAS and STATE_BUSOFF bits in the CiSTR register are set to "0" as well. When both RESET1 and RESET0 bit settings are changed "1" to "0", the CiTSR register starts counting. CAN communication is available after 11 continuous recessive bits are detected. NOTES: 1. Set the same value in both RESET1 and RESET0 bits simultaneously. 2. Confirm that the STATE_RESET bit in the CiSTR register is set to "1" (CAN module reset completed) after setting the RESET1 and RESET0 bits to "1". 3. The CANOUT pin puts in a high-level ("H") signal as soon as the RESET1 and RESET0 bits are set to "1". CAN bus error may occur when the RESET1 and RESET0 bits are set to "1" while the CAN frame is transmitting. 4. For CAN communication, set the PS1, PS2, PS3, PSL1, PSL2, PSL3, PSC, PSC2, PSC3, IPS, IPSA, PD7, PD8 and PD9 registers when the STATE_RESET bit is set to "1" (CAN module reset completed). 23.1.1.2 LOOPBACK Bit When the LOOPBACK bit is set to "1" (loopback function enabled) and the receive message slot has a matched ID and frame format with a transmitted frame, the transmitted frame is stored to the receive message slot. NOTES: 1. No ACK for the transmitted frame is returned. 2. Change the LOOPBACK bit setting only when the STATE_RESET bit is set to "1" (CAN module reset completed). 23.1.1.3 BASICCAN Bit When the BASICCAN bit is set to "1", the message slots 14 and 15 enter BasicCAN mode. In BasicCAN mode, the message slots 14 and 15 are used as dual-structured buffers. The message slots 14 and 15 alternately store a received frame having matched ID detected by acceptance filtering. ID in the message slot 14 and the CiLMAR0 to CiLMAR4 registers are used for acceptance filtering when the message slot 14 is active (the next received frame is to be stored in the message slot 14). ID in the message slot 15 and the CiLMBR0 to CiLMBR4 registers are used when the message slot 15 is active. Both data frame and remote frame can be received. Use the following procedure to enter BasicCAN mode. (1) Set the BASICCAN bit to "1". (2) Set the same value into IDs in the message slots 14 and 15. (3) Set the same value in the CiLMAR0 to CiLMAR4 registers and CiLMBR0 to CiLMBR4 registers. (4) Set the IDE14 and IDE15 bits in the CiIDR register to select a frame format (standard or ex- tended) for the message slots 14 and 15. (Set to the same format.) (5) Set the CiMCTL14 and CiMCTL15 registers in the message slots 14 and 15 to receive the data frame. |
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