M32CSLASH86 datasheet(365/505 Pages) RENESAS

365 / 505 page

Page 342

23. CAN Module

)

(

CANi Global Mask Register Standard ID0(1)

CANi Local Mask Register A Standard ID0(1)

CANi Local Mask Register B Standard ID0(1) (i=0, 1)

Symbol

Address

After Reset(2)

C0GMR0, C1GMR0

022816, 02A816

XXX0 00002

C0LMAR0, C1LMAR0

023016(3), 02B016(4)

XXX0 00002

C0LMBR0, C1LMBR0

023816(5), 02B816(6)

XXX0 00002

SID6M

SID7M

SID8M

SID9M

Standard ID6

0: No ID is verified

1: ID is verified

Standard ID7

Standard ID8

Standard ID9

SID10M

(b7 - b5)

Standard ID10

Bit Name

Function

Bit

Symbol

Nothing is assigned. When write, set to "0".

When read, its content is indeterminate.

NOTES:

1. The CiGMR0, CiLMAR0 and CiLMBR0 registers can be accessed only when the BANKSEL bit in

the CiCTLR1 register is set to "1" (mask register selected).

2. Value is obtained by setting the SLEEP bit in the CiSLPR register to "1" (sleep mode exited) after

reset, supplying the clock to the CAN module, and setting the BANKSEL bit to "1".

3. The C0LMAR0 register shares the same address with the C0MCTL0 register.

4. The C1LMAR0 register shares the same address with the C1MCTL0 register.

5. The C0LMBR0 register shares the same address with the C0MCTL8 register.

6. The C1LMBR0 register shares the same address with the C1MCTL8 register.

23.1.19 CANi Global Mask Register, CANi Local Mask Register A and CANi Local Mask

Figure 23.22 C0GMR0, C0LMAR0 and C0LMBR0 Registers

C1GMR0, C1LMAR0 and C1LMBR0 Registers

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