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M32C/86 데이터시트(PDF) 258 Page - Renesas Technology Corp

부품명 M32C/86
상세설명  RENESAS 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES
PDF  505 Pages
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

M32C/86 데이터시트(HTML) 258 Page - Renesas Technology Corp

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Page 235
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17. Serial I/O (Special Function)
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D0
D1
D2
D3
D4
D5
D6
D7
P
Transfer Clock
TxDi
TxDi
D7
D6
D5
D4
D3
D2
D1
D0
P
(1) Direct Format
Transfer Clock
(2) Inverse Format
P : Odd parity
"H"
"L"
"H"
"L"
"H"
"L"
"H"
"L"
P : Even parity
i=0 to 4
17.7.2 Format
17.7.2.1 Direct Format
Set the PRYE bit in the UiMR register (i=0 to 4) to "1" (parity enabled), the PRY bit to "1" (even
parity), the UFORM bit in the UiC0 register to "0" (LSB first) and the UiLCH bit in the UiC1 register to
"0" (not inversed). When data are transmitted, data set in the UiTB register are transmitted with the
even-numbered parity, starting from D0. When data are received, received data are stored in the
UiRB register, starting from D0. The even-numbered parity determines whether a parity error occurs.
17.7.2.2 Inverse Format
Set the PRYE bit to "1", the PRY bit to "0" (odd parity), the UFORM bit to "1" (MSB first) and the
UiLCH bit to "1" (inversed). When data are transmitted, values set in the UiTB register are logically
inversed and are transmitted with the odd-numbered parity, starting from D7. When data are re-
ceived, received data are logically inversed to be stored in the UiRB register, starting from D7. The
odd-numbered parity determines whether a parity error occurs.
Figure 17.32 SIM Interface Format



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