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SH7014 데이터시트(PDF) 173 Page - Renesas Technology Corp

부품명 SH7014
상세설명  32-Bit RISC Microcomputer
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8. Bus State Controller (BSC)
Rev.5.00 Sep. 27, 2007 Page 139 of 716
REJ09B0398-0500
8.5.3
CS Assertion Extension
The timing diagram when CS assertion extension is set for address/data multiplexed I/O space
access is shown in figure 8.19.
CS3
AH
RD
Data
WRx
Data
Address
Ta1
Ta2
Ta3
Ta4
Th
T1
T2
Tf
Read
Write
Address output
Address output
Data output
Data input
Figure 8.19 Wait Timing for Address/Data Multiplexed I/O Space
When CS Assertion Extension is Set



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