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SH7021 데이터시트(PDF) 46 Page - Renesas Technology Corp |
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SH7021 데이터시트(HTML) 46 Page - Renesas Technology Corp |
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46 / 509 page ![]() RENESAS25 Table 2.8 Addressing Modes and Effective Addresses (cont) Addressing Mode Mnemonic Expression Effective Addresses Calculation Equation Immediate addressing #imm:8 The 8-bit immediate data (imm) for the TST, AND, OR, and XOR instructions are zero-extended. — #imm:8 The 8-bit immediate data (imm) for the MOV, ADD, and CMP/EQ instructions are sign-extended. — #imm:8 Immediate data (imm) for the TRAPA instruction is zero-extended and is quadrupled. — 2.3.3 Instruction Formats The instruction format refers to the source operand and the destination operand. The meaning of the operand depends on the instruction code. Symbols are as follows. xxxx Instruction code mmmm Source register nnnn Destination register iiii Immediate data dddd Displacement Table 2.9 Instruction Formats Instruction Formats Source Operand Destination Operand Instruction Example 0 format xxxx xxxx xxxx xxxx 15 0 —— NOP n format — nnnn: Direct register MOVT Rn xxxx xxxx xxxx nnnn 15 0 Control register or system register nnnn: Direct register STS MACH,Rn Control register or system register nnnn: Indirect pre- decrement register STC.L SR,@-Rn |
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