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SH7713 데이터시트(PDF) 91 Page - Renesas Technology Corp |
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SH7713 데이터시트(HTML) 91 Page - Renesas Technology Corp |
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91 / 904 page ![]() Section 2 CPU Rev.1.50 Aug. 30, 2006 Page 51 of 860 REJ09B0288-0150 Instruction Format Source Operand Destination Operand Sample Instruction i type xxxx xxxx i i i i i i i i 15 0 iiiiiiii: immediate Indexed GBR indirect AND.B #imm,@(R0,GBR) iiiiiiii: immediate R0 (register direct) AND #imm,R0 iiiiiiii: immediate — TRAPA #imm ni type xxxx nnnn i i i i i i i i 15 0 iiiiiiii: immediate nnnn: register direct ADD #imm,Rn Note: * In multiply-and-accumulate instructions, nnnn is the source register. |
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