SH7713 datasheet(137/904 Pages) RENESAS

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Section 3 DSP Operating Unit

Rev.1.50 Aug. 30, 2006 Page 97 of 860

REJ09B0288-0150

3.4.1

General Registers

The DSP instructions 10 general registers in the 16 general registers as address pointers or index

registers for double data transfers and single data transfers. In the following descriptions, another

• Double data transfer instructions (X memory and Y memory are accessed simultaneously)

In double data transfers, X memory Y memory can be accessed simultaneously. To specify X

and Y memory addresses, two address pointers are supported.

Address Pointer

Index Register

X memory (MOVX.W)

R4, R5[Ax]

R8 [Ix]

Y memory (MOVY.W)

R6, R7[Ay]

R9 [Iy]

• Single data transfer instructions

In single data transfer, any logical address space can be accessed via the L bus. The following

address pointers and index registers are used.

Address Pointer

Index Register

Any logical space (MOVS.W/L)

R4, R5, R2, R3[As]

R8 [Is]

General registers (DSP mode)

X and Y double data transfers:

R4, 5

Single data transfer s:

R4, 5, 2, 3

R6, 7

[Ax]

[Ix]

[As]

[Is]

[Ay]

[Iy]

: Address register set for the for X data memory

: Index regiser for X address register set Ax

: Address register set for all data memories

: Index regiser used for single data transfers

: Address register set for the for Y data memory

: Index regiser for Y address register set Ay

R10

R11

R12

R13

R14

R15

[As2]

[As3]

[As0]

[As1, Ax1]

[Ay0]

[Ay1]

[Ix, Is]

[Iy]

Figure 3.5 General Registers (DSP Mode)

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