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SH7713 데이터시트(PDF) 178 Page - Renesas Technology Corp

부품명 SH7713
상세설명  Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
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SH7713 데이터시트(HTML) 178 Page - Renesas Technology Corp

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Section 3 DSP Operating Unit
Rev.1.50 Aug. 30, 2006 Page 138 of 860
REJ09B0288-0150
3.5.12
Local Data Move Instruction
The DSP unit of this LSI provides additional two independent registers, MACL and MACH, in
order to support CPU standard multiply/MAC operations. They can be also used as temporary
storage registers by local data move instructions between MACH/L and other DSP registers.
Figure 3.22 shows the flow of seven local data move instructions. Table 3.33 shows the variation
of this type of instruction.
PLDS
PSTS
Cannot be used
X0
Y0
MACH
MACL
X1
Y1
M1
A1
M0
A0
A0G
A1G
DSR
Figure 3.22 Local Data Move Instruction Flow
Table 3.33
Variation of Local Data Move Operations
Mnemonic
Function
Operand
PLDS
Data move from DSP register to MACL/MACH
Dz
PSTS
Data move from MACL/MACH to DSP register
Dz
This instruction is very similar to other transfer instructions. If either the A0 or A1 register is
specified as the destination operand of PSTS, the signed bit is sign-extended and copied into the
corresponding guard-bit parts, A0G or A1G. The DC bit in DSR and other condition code bits are
not updated regardless of the instruction result. This instruction can operate as a conditional. This
instruction can operate with MOVX and MOVY in parallel.



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