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SH7721 데이터시트(PDF) 144 Page - Renesas Technology Corp |
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SH7721 데이터시트(HTML) 144 Page - Renesas Technology Corp |
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144 / 1524 page ![]() Section 3 DSP Operating Unit Rev. 3.00 Jan. 18, 2008 Page 82 of 1458 REJ09B0033-0300 performs data transfers between the DSP unit registers and all virtual address spaces. For details, refer to section 3.4, DSP Data Transfer Instructions. (4) DSP Unit Operation Instructions DSP unit operation instructions are called DSP data operation instructions. These instructions are provided to execute digital signal processing operations at high speed using the DSP. Instruction codes for these instructions are 32 bits. The DSP data operation instruction fields consist of two fields: field A and field B. In field A, a function for double data transfer instructions can be described. In field B, ALU operation instructions and multiply instructions can be described. The instructions described in fields A and B can be executed in parallel. A maximum of four instructions (ALU operation, multiply, and two data transfers) can be executed in parallel. For details, refer to section 3.5, DSP Data Operation Instructions. Notes: 1. 32-bit instruction codes are handled as two consecutive 16-bit instruction codes. Accordingly, 32-bit instruction codes can be assigned to a word boundary. 32-bit instruction codes must be stored in memory, upper word and lower word, in this order, in word units. 2. In little endian, the upper and lower words must be stored in memory as data to be accessed in word units. CPU core instruction 15 0000 1110 111100 111101 111110 A Field A Field A Field B Field 0 15 0 15 10 10 9 12 11 90 31 16 26 25 0 15 Double-data transfer instruction Single-data transfer instruction DSP data operation instruction * Figure 3.1 DSP Instruction Format |
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