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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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7905 데이터시트(PDF) 39 Page - Renesas Technology Corp |
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7905 데이터시트(HTML) 39 Page - Renesas Technology Corp |
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39 / 565 page  7905 Group User’s Manual Rev.1.0 2-16 CENTRAL PROCESSING UNIT (CPU) 2.4 Memory assignment UART2 transmit Timer A7 Timer A8 UART2 receive Timer A9 Timer A6 Reserved area Timer B2 Watchdog timer Reserved area INT0 INT1 INT2 Timer A0 Timer A1 Timer A2 Timer A3 Timer A4 Timer B0 Timer B1 Notes 1: These are interrupts only for debugging; do not use these interrupts. 2: Memory assignment of the internal area varies according to the product type. Refer to section “Appendix 11. Memory assignment of 7905 Group” or the latest datasheets, catalogues. : The internal memory is not assigned. RESET Zero divide L H FFFA16 FFFC16 FFFE16 Interrupt vector table FF16 016 FFFF16 FFB416 Internal RAM area → See Figures 2.4.2 and 2.4.3. Internal ROM area SFR area L H L H BRK instruction (Note 1) FFF816 L H DBC (Note 1) FFF616 L H FFF416 L H FFF216 L H FFF016 L H FFEE16 L H FFEC16 L H FFEA16 L H FFE816 L H FFE616 L H FFE416 L H FFE216 L H FFE016 L H FFDE16 L H FFDC16 L H UART0 receive FFDA16 L H UART0 transmit FFD816 L H UART1 receive FFD616 L H UART1 transmit FFD416 L H A-D conversion FFD216 L H INT3 FFD016 L H INT4 FFCE16 L H Reserved area FFCC16 L H Reserved area FFCA16 L H Address matching detection FFC816 L FFC616 L H FFC416 L H FFC216 L H FFC016 L H Timer A5 H FFB616 FFBE16 FFB416 FFB816 FFBC16 FFBA16 INT7 INT6 INT5 L H L H L H L H L H L H Fig. 2.4.1 Memory assignment in internal area |
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