TDA9113 datasheet(37/50 Pages) STMICROELECTRONICS

37 / 50 page

TDA9113

37/50

condition for the reset of the R-S flip-flop, OR-ed

with the one described before, is that the voltage

on pin BISense exceeds the voltage VC1, which

depends on the voltage applied on input BISense

of the error amplifier O1. The two voltages are

compared, and the reset signal generated by the

comparator C1. The error amplifier amplifies (with

a factor defined by external components) the dif-

ference between the input voltage proportional to

DC/DC convertor output voltage and internal refer-

ence VBReg. The internal reference and so the out-

put voltage is I2C bus adjustable by means of

BREF I2C bus control.

Both step-up (DC/DC converter output voltage

higher than its input voltage) and step-down (out-

put voltage lower than input) are possible.

DC/DC controller Off-to-On edge timing

Figure 15. DC/DC converter controller block diagram

BOutPh

(Sad07/

D7)

BOHEdge

(Sad17/

D3)

Timing of Off-to-O n transition

on BOut outpu t

don’t care Middle of H-flyback plus tBTrigDel

Falling edge of H-drive signal

Rising edge of H-drive signal

BRegIn

BComp

BIsense

BOut

N type

Soft start

H-drive edge

H-flyback

~500ns

Monostable

HBOutEn

P type

VCC

Feedback

BOutPol

(I2C)

XRayAlarm

(I2C)

BOutPh

(I2C)

HPosF

VThrBIsCurr

(+delay)

BOHEdge

(I2C)

VBReg

VC1

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