TS616IDWT datasheet(18/27 Pages) STMICROELECTRONICS

18 / 27 page

TS616

18/27

PRINTED CIRCUIT BOARD LAYOUT

CONSIDERATIONS

In the ADSL frequency range, printed circuit board

parasites can affect the closed-loop performance.

The implementation of a proper ground plane on

both sides of the PCB is mandatory to provide low

inductance and low resistance common return.

The most important factors affecting gain flatness

and bandwidth are stray capacitances at the out-

put and inverting input. To minimize these capaci-

tances, the space between signal lines and

ground plane should be increased. Feedback

components connections must be as short as pos-

sible in order to decrease the associated induc-

tance which affects high frequency gain errors. It

is very important to choose the smallest possible

external

components,

for

example,

surface

mounted devices (SMD) in order to minimize the

size of all DC and AC connections.

THERMAL INFORMATION

The TS616 is housed in an Exposed-Pad plastic

package. As depicted in figure 55, this package

uses a lead frame upon which the die is mounted.

This lead frame is exposed as a thermal pad on

the underside of the package. The thermal contact

is direct with the dice. This thermal path provides

excellent colling.

The thermal pad is electrically isolated from all

pins in the package. It should be soldered to a

copper area of the PCB underneath the package.

Through these thermal paths within this copper ar-

ea, heat can be conducted away from the pack-

age. In this case, the copper area should be con-

nected to (-VCC).

Figure 55: Exposed-Pad Package

Figure 56: Evaluation Board

Cross Section View

Bottom View

Side View

DICE

Cross Section View

Bottom View

Side View

DICE

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