CS42888-CQZ datasheet(33/61 Pages) CIRRUS

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DS717F2

CS42888

4.5.7

I/O Channel Allocation

4.6

AUX Port Digital Interface Formats

These serial data lines are used when supporting the TDM Mode of operation with an external ADC or

S/PDIF receiver attached. The AUX serial port operates only as a clock master. The AUX_SCLK will operate

at 64xFs, where Fs is equal to the ADC sample rate (ADC_LRCK). If the AUX_SDIN signal is not being

used, it should be tied to AGND via a pull-down resistor.

The AUX port will operate in either the Left-Justified or I²S digital interface format with bit depths ranging

from 16 to 24 bits. Settings for the AUX port are made through the register “Interface Formats (Address

04h)” on page 43.

4.6.1

I²S

4.6.2

Left-Justified

4.7

Control Port Description and Timing

The control port is used to access the registers allowing the CS42888 to be configured for the desired op-

erational modes and formats. The operation of the control port may be completely asynchronous with re-

spect to the audio sample rates. However, to avoid potential interference problems, the control port pins

should remain static if no operation is required.

The control port has two modes: SPI and I²C, with the CS42888 acting as a slave device. SPI Mode is se-

lected if there is a high-to-low transition on the AD0/CS pin, after the RST pin has been brought high. I²C

Mode is selected by connecting the AD0/CS pin through a resistor to VLC or DGND, thereby permanently

selecting the desired AD0 bit address state.

Digital Input/Output

Interface

Format

Analog Output/Input Channel Allocation

from/to Digital I/O

DAC_SDIN1

I²S, LJ, RJ

OLM

TDM

AOUT 1,2

AOUT 1,2,3,4,5,6

AOUT 1,2,3,4,5,6,7,8

ADC_SDOUT1

I²S, LJ, RJ

OLM

TDM

AIN 1,2

AIN 1,2,3,4

AIN 1,2,3,4 (2 additional channels from AUX_SDIN)

Table 9. Serial Audio Interface Channel Allocations

AUX_LRCK

AUX_SCLK

MS B

LS B

MS B

LS B

AUX1

Le ft C h a nne l

R ig h t C h an ne l

AUX_SDIN

AUX2

MSB

Figure 20. AUX I²S Format

AUX_LRCK

AUX_SCLK

MS B

LS B

MS B

LS B

AUX1

Le ft C hann e l

R ig h t C ha n n e l

AUX_SDIN

AUX2

MSB

Figure 21. AUX Left-Justified Format

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