AT89C5122D-RDRUM datasheet(97/208 Pages) ATMEL

97 / 208 page

AT83R5122, AT8xC5122/23

4202F–SCR–07/2008

Configuration

General Configuration

•

USB controller enable

Before any USB transaction, the 48 MHz required by the USB controller must be cor-

rectly generated (Section "Clock Controller", page 39).

The USB controller should be then enabled by setting the USBE bit in the USBCON

•

Set address

After a Reset or a USB reset, the software has to set the FEN (Function Enable) bit in

the USBADDR register. This action will allow the USB controller to answer to the

requests sent at the address 0.

When a SET_ADDRESS request has been received, the USB controller must only

answer to the address defined by the request. The new address should be stored in the

USBADDR register. The FEN bit and the FADDEN bit in the USBCON register should

be set to allow the USB controller to answer only to requests sent at the new address.

•

Set configuration

The CONFG bit in the USBCON register should be set after a SET_CONFIGURATION

request with a non-zero value. Otherwise, this bit should be cleared.

Endpoint Configuration

•

Selection of an Endpoint

The endpoint register access is performed using the UEPNUM register. The following

registers

correspond to the endpoint whose number is stored in the UEPNUM register. To select

an Endpoint, the firmware has to write the endpoint number in the UEPNUM register.

–

UEPSTAX,

–

UEPCONX,

–UEPDATX,

–

UBYCTX,

Figure 52.

Endpoint Selection

UEPNUM

Endpoint 0

Endpoint 6

UEPSTA0

UEPCON0

UEPDAT0

UEPSTA6

UEPCON6

UEPDAT6

SFR Registers

UEPSTAX

UEPCONX

UEPDATX

UBYCT0

UBYCT6

UBYCTX

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