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AT89C51ED2-RDTUM 데이터시트(PDF) 13 Page - ATMEL Corporation |
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AT89C51ED2-RDTUM 데이터시트(HTML) 13 Page - ATMEL Corporation |
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13 / 137 page ![]() 13 4235K–8051–05/08 AT89C51RD2/ED2 ALE/PRO G 33 27 68 56 O (I) Address Latch Enable/Program Pulse: Output pulse for latching the low byte of the address during an access to external memory. In normal operation, ALE is emitted at a constant rate of 1/6 (1/3 in X2 mode) the oscillator frequency, and can be used for external timing or clocking. Note that one ALE pulse is skipped during each access to external data memory. This pin is also the program pulse input (PROG) during Flash programming. ALE can be disabled by setting SFR’s AUXR.0 bit. With this bit set, ALE will be inactive during internal fetches. PSEN 32 26 67 55 O Program Strobe ENable: The read strobe to external program memory. When executing code from the external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory. PSEN is not activated during fetches from internal program memory. EA 35 29 2 58 I External Access Enable: EA must be externally held low to enable the device to fetch code from external program memory locations 0000H to FFFFH. If security level 1 is programmed, EA will be internally latched on Reset. Table 4-1. Pin Description (Continued) Mnemonic Pin Number Type Name and Function PLCC44 VQFP44 PLCC68 VQFP64 |
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