AT88SC0104C datasheet(20/58 Pages) ATMEL

20 / 58 page

5210B–SMIC–11/08

AT88SC0104/0204/0404/0808/1616/3216/6416/12816/25616C

5.3.8.1

SME – Supervisor Mode Enable

Asserting this bit (SME = “0”) enables supervisor mode for Write 7 password such that verifying

Write 7 password grants read and write accesses to all password sets and PACs. Verifying

Write 7 password does not grant access to other passwords when this bit is not asserted (SME

= “1”).

5.3.8.2

UCR – Unlimited Checksum Reads

UCR is applicable under authentication and encryption modes of operation.

5.3.8.3

UAT – Unlimited Authentication Trials

UAT is applicable under the authentication mode of operation.

5.3.8.4

ETA – Eight Trials Allowed

Asserting this bit (ETA = “0”) extends the trials limit to 8 incorrect attempts to verify a password.

The password attempt counter (PAC) will decrement ($FF, $FE, $FC, $F8, $F0, $E0, $C0, $80,

$00) with each incorrect attempt. Disabling this bit (ETA = “1”) limits password verification trials

to only four incorrect attempts ($FF, $EE, $CC, $88, $00). The ETA bit also has an application

in the authentication mode of operation.

5.3.8.5

CS0 – CS3: Programmable Chip Select (only relevant in synchronous protocol)

The four most significant bits (b4 – b7) of every command comprise the Chip Select Address. All

CryptoMemory devices will respond to the default Chip Select Address of $B (1011). Each

device also responds to a second Chip Select Address programmed into CS0-CS3 of the Device

Configuration Register. By programming each device to a unique Chip Select Address, it is pos-

sible to connect up to 15 devices on the same Serial Data bus and communicate individually to

each. Global communications to all devices sharing the bus is accomplished using the default

Chip Select Address $B.

5.3.9

Access Registers

Four, eight, or sixteen 8-bit access registers allow personalization of the device. Each access

each individual zone of the user memory. Values in the access registers take immediate effect

after programming. The default value for each bit is “1”.

5.3.9.1

PM(1:0) Password Mode

Table 5-4.

Access Register

Bit 7

Bit 6

Bit 5

Bit4

Bit 3

Bit 2

Bit 1

Bit 0

PM1

PM0

AM1

AM0

WLM

MDF

PGO

Table 5-5.

Password Mode

PM0

PM1

Access

No Password required

Write Password required

Read and Write Passwords required

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