PROASIC3E datasheet(16/37 Pages) ACTEL

16 / 37 page

I/O Structures in IGLOOe and ProASIC3E Devices

v1.4

Table 9 • Hot-Swap Level 1

Description

Cold-swap

Power Applied to Device

Bus State

–

Card Ground Connection

–

Device Circuitry Connected to Bus Pins

–

Example Application

System and card with Actel FPGA chip are

powered down, and the card is plugged into

the system. Then the power supplies are turned

on for the system but not for the FPGA on the

card.

Compliance of IGLOO and ProASIC3 Devices

30 k gate devices: Compliant

Other IGLOO/ProASIC3 devices: Compliant if bus

switch used to isolate FPGA I/Os from rest of

system

IGLOOe/ProASIC3E devices: Compliant I/Os can,

but do not have to be set to hot-insertion

mode.

Table 10 • Hot-Swap Level 2

Description

Hot-swap while reset

Power Applied to Device

Yes

Bus State

Held in reset state

Card Ground Connection

Reset must be maintained for 1 ms before,

during, and after insertion/removal.

Device Circuitry Connected to Bus Pins

–

Example Application

In the PCI hot-plug specification, reset control

circuitry isolates the card busses until the card

supplies are at their nominal operating levels

and stable.

Compliance of IGLOO and ProASIC3 Devices

30 k gate devices, all IGLOOe/ProASIC3E devices:

Compliant I/Os can but do not have to be set to

hot-insertion mode.

Other IGLOO/ProASIC3 devices: Compliant

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