AX2000-1CGG896 datasheet(44/226 Pages) ACTEL

44 / 226 page

Axcelerator Family FPGAs

2- 30

v2.7

3.3V PCI, 3.3V PCI-X

Peripheral Component Interface for 3.3V standard specifies support for both 33 MHz and 66 MHz PCI bus applications.

It uses an LVTTL input buffer and a push-pull output buffer. The input and output buffers are 5V tolerant with the aid

of external components. Axcelerator 3.3V PCI and 3.3V PCI-X buffers are compliant with the PCI Local Bus Specification

Rev. 2.1.

The PCI Compliance Specification requires the clamp diodes to be able to withstand for 11 ns, -3.5V in undershoot, and

7.1V in overshoot.

AC Loadings

Table 2-32 • DC Input and Output Levels

VIL

VIH

VOL

VOH

IOL

IOH

Min,V

Max,V

Min,V

Max,V

Min,V

PCI

-0.5

0.3VCCI

0.5VCCI

VCCI+0.5

(per PCI specification)

PCI-X

-0.5

0.35VCCI

0.5VCCI

VCCI+0.5

(per PCI specification)

Figure 2-18 • AC Test Loads

Table 2-33 • AC Waveforms, Measuring Points, and Capacitive Loads

Input Low (V)

Input High (V)

Measuring Point* (V)

VREF (typ) (V)

Cload (pF)

(Per PCI Spec and PCI-X Spec)

N/A

* Measuring Point = Vtrip

R to V

for tpl

R to GND for tph

CCI

10pF

GND

Test point for data

R=25

35 pF for tpzl/tpzh

5 pF for tphz/tplz

R to VCCI for tplz/tpzl

R to GND for tphz/tpzh

Test Point

for tristate

R=1k

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