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CDK1300 데이터시트(PDF) 5 Page - Cadeka Microcircuits LLC.

부품명 CDK1300
상세설명  8-bit, 250 MSPS ADC with Demuxed Outputs
PDF  12 Pages
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제조업체  CADEKA [Cadeka Microcircuits LLC.]
홈페이지  http://www.cadeka.com
Logo CADEKA - Cadeka Microcircuits LLC.

CDK1300 데이터시트(HTML) 5 Page - Cadeka Microcircuits LLC.

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©2008 CADEKA Microcircuits LLC
www.cadeka.com
5
Data Sheet
Electrical Characteristics
(TA = TMin to TMax, AVCC= +5V, OVDD = +5V, ƒclk = 250MHz, 50% duty cycle,
ƒIN = 70MHz, dual channel mode; unless otherwise noted)
symbol
parameter
conditions
Min
typ
Max
units
Power Supply Requirements
AVcc
Analog Voltage Supply(2)
4.75
5.0
5.25
V
OVDD
Digital Voltage Supply(2)
2.75
5.25
V
AVcc
Current(1)
62
70
mA
Power Dissipation(1)
with Internal Voltage Reference
310
350
mW
Common Mode Reference Output
Voltage(1)
2.45
2.5
2.55
V
Voltage Tempco
100
ppm/°C
Output Impedance
IOUT = ±50µA
1
kΩ
PSRR
Power Supply Rejection Ratio
63
mV/V
Clock and Reset Inputs (Differential and Single-Ended)
VDIFF
Differental Signal Amplitude(1)
400
mVpp
VIHD
Differental High Input Voltage(2)
1.4
5
V
VILD
Differental Low Input Voltage(2)
0
3.9
V
VCMD
Differental Common Mode Input(2)
1.2
4.1
V
VIH
Single-Ended High Input Voltage(2)
1.8
V
VIL
Single-Ended Low Input Voltage(2)
1.2
V
IIH
High Input Current(1)
VID = 1.5V
-100
20
+100
µA
IIL
Low Input Current(1)
VID = 1.5V
-100
20
+100
µA
Power Down and Mode Control Inputs (Single-Ended)
High Input Voltage(2)
2.0
AVcc
V
Low Input Voltage(2)
0
1.0
V
Max Input Current Low(1)
-100
10
+100
µA
Max Input Current High <4.0V(1)
-100
10
+100
µA
Digital Outputs
Logic “1“ Voltage(1)
IOH = -0.5mA
OVDD-2.0 OVDD-0.06
V
Logic “0“ Voltage(1)
IOL = +1.6mA
0.13
0.2
V
TR/TF Data
OVDD = 3V, 10pF load
3.5
ns
OVDD = 5V, 10pF load
2.0
ns
TR/TF DCLK
OVDD = 3V, 10pF load
1.3
ns
OVDD = 5V, 10pF load
0.7
ns
notes:
1. 100% production tested at +25°C.
2. Parameter is guaranteed (but not tested) by design and characterization data.



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