SN75LBC970A

SCSI DIFFERENTIAL CONVERTER-CONTROL

SLLS215B – MAY 1995 – REVISED JANUARY 1999

13

POST OFFICE BOX 655303

PARAMETER MEASUREMENT INFORMATION

ten1

tdis1

RESET

TEST

DSENS

RSTFLTR

Output

1.5 V

Input

B–

15 pF

Input

Output

0 V

1.5 V

3 V

t0

t0

or

delay

delay

VOL

1.5 V

VOH

B+

A–

ten3

tdis3

ten2

tdis2

ten4

Reset

Bus Free

Arbitration

to Select 1

CLK40

(See Note A)

BRST –

BBSY –

BSEL –

ARST –

ABSY –

ASEL –

NOTE A: These are asynchronous events and do not necessarily align with clock edges.

Figure 7. B-Side to A-Side Enable and Disable Delay Time Test Circuit and Timing Definitions