PCM1795DB datasheet(18/58 Pages) TI

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Power-On and External Reset Functions

Reset

1024SystemClocks

2.4V(Max)

2V(Typ)

1.6V(Min)

InternalReset

SystemClock

ResetRemoval

Reset

Reset Removal

1024SystemClocks

InternalReset

SystemClock

RST (Pin14)

(RST)

1.4V

PCM1795

SLES248 – MAY 2009 ........................................................................................................................................................................................................ www.ti.com

The PCM1795 includes a power-on reset function, as shown in Figure 35. With VDD > 2 V, the power-on reset

function is enabled. The initialization sequence requires 1024 system clocks from the time VDD > 2 V. After the

initialization period, the PCM1795 is set to its default reset state, as described in the Mode Control Registers

section.

The PCM1795 also includes an external reset capability using the RST input (pin 14). This feature allows an

external controller or master reset circuit to force the PCM1795 to initialize to the default reset state.

Figure 36 and Table 4 show the external reset operation and timing. The RST pin is set to logic 0 for a minimum

of 20 ns. The RST pin is then set to a logic 1 state, thus starting the initialization sequence that requires 1024

system clock periods. The external reset is especially useful in applications where there is a delay between the

PCM1795 power-up and system clock activation.

Figure 35. Power-On Reset Timing

Figure 36. External Reset Timing

Table 4. Timing Characteristics for Figure 36

PARAMETER

MIN

MAX

UNIT

t(RST)

Reset pulse duration, low

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