TUSB3200CPAH datasheet(80/93 Pages) TI

80 / 93 page

A–32

A.5.4.4 CODEC Port Interface Configuration Register 4 (CPTCNF4 – Address FFDDh)

The CODEC port interface configuration register 4 is used to store various control bits for the CODEC port interface

operation.

Bit

Mnemonic

ATSL3

ATSL2

ATSL1

ATSL0

CLKS

DIVB2

DIVB1

DIVB0

Type

R/W

Default

BIT

MNEMONIC

NAME

DESCRIPTION

7:4

ATSL(3:0)

Command/status address/data

time slot

The command/status address/data time slot bits are set by the MCU to program the

time slots to be used for the secondary communication address and data values. For

the AC ’97 modes of operation, this value should be set to 0001b which will result in

time slot 1 being used for the address and time slot 2 being used for the data. For the

AIC and general-purpose modes of operation, the same time slot is used for both

address and data. For the AIC mode of operation, for example, this value should be

set to 0111b which will result in time slot 7 being used for both the address and data.

0000b = time slot 0,

0001b = time slot 1,

…, 1111b = time slot 15

CLKS

Clock select

The clock select bit is used by the MCU to select the source of the clock signal to be

used for the divide by B circuit. The MCU sets this bit to a 1 to select the output of the

divide by I circuit as the clock for the divide by B circuit. The MCU sets this bit to a 0 to

select the output of the divide by M circuit as the clock for the divide by B circuit.

2:0

DIVB(2:0)

Divide by B value

The divide by B control bits are set by the MCU to program the CSCLK signal divider.

000b = disabled

001b = divide by 2

010b = divide by 3

011b = divide by 4

100b = divide by 5

101b = divide by 6

110b = divide by 7

111b = divide by 8

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