LPC2917SLASH01 datasheet(21/86 Pages) NXP

21 / 86 page

LPC2917_19_01_2

Preliminary data sheet

Rev. 02 — 17 June 2009

21 of 86

NXP Semiconductors

LPC2917/01; LPC2919/01

ARM9 microcontroller with CAN and LIN

When an AHB data port read transfer requires data from a different ﬂash word to that

involved in the previous read transfer, a new ﬂash read is done and wait states are given

until the new read data is available.

With dual buffering, a secondary buffer line is used, the output of the ﬂash being

considered as the primary buffer. On a primary buffer, hit data can be copied to the

secondary buffer line, which allows the ﬂash to start a speculative read of the next ﬂash

word.

Both buffer lines are invalidated after:

• Initialization

• Conﬁguration-register access

• Data-latch reading

• Index-sector reading

The modes of operation are listed in Table 9.

6.8.2 Pin description

The ﬂash memory controller has no external pins. However, the ﬂash can be programmed

via the JTAG pins, see Section 6.6.3.

6.8.3 Clock description

The ﬂash memory controller is clocked by CLK_SYS_FMC, see Section 6.7.2.

6.8.4 Flash layout

The ARM processor can program the ﬂash for ISP (In-System Programming) and IAP (In-

Application Programming). Note that the ﬂash always has to be programmed by ‘ﬂash

words’ of 128 bits (four 32-bit AHB bus words, hence 16 bytes).

The ﬂash memory is organized into eight ‘small’ sectors of 8 kB each and up to 11 ‘large’

sectors of 64 kB each. The number of large sectors depends on the device type. A sector

must be erased before data can be written to it. The ﬂash memory also has sector-wise

protection. Writing occurs per page which consists of 4096 bits (32 ﬂash words). A small

sector contains 16 pages; a large sector contains 128 pages.

Table 9.

Flash read modes

Synchronous timing

No buffer line

for single (non-linear) reads; one ﬂash-word read per word read

Single buffer line

default mode of operation; most recently read ﬂash word is kept until

another ﬂash word is required

Asynchronous timing

No buffer line

one ﬂash-word read per word read

Single buffer line

most recently read ﬂash word is kept until another ﬂash word is

required

Dual buffer line, single

speculative

on a buffer miss a ﬂash read is done, followed by at most one

speculative read; optimized for execution of code with small loops

(less than eight words) from ﬂash

Dual buffer line, always

speculative

most recently used ﬂash word is copied into second buffer line; next

ﬂash-word read is started; highest performance for linear reads

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