
CY24242
Document #: 38-07268 Rev. *B
Page 8 of 10
REF Clock Outputs (Lump Capacitance Test Load = 20 pF)
Parameter
Description
Test Condition/Comments
CPU = 66/100 MHz
Unit
Min.
Typ.
Max.
f
Frequency, Actual
Frequency equal to the reference
provided at pins X1, X2
14.318
MHz
tR
Output Rise Edge Rate Measured from 0.4V to 2.0
0.5
–
2
V/ns
tF
Output Fall Edge Rate Measured from 2.0V to 0.4V
0.5
–
2
V/ns
tD
Duty Cycle
Measured on rising and falling edge at
1.25V
45
–
55
%
fST
Frequency Stabilization
from Power-up (cold
start)
Assumes full supply voltage reached
within 1 ms from power-up. Short cycles
exist prior to frequency stabilization.
––
3
ms
Zo
AC Output Impedance Average value during switching
transition. Used for determining series
termination value.
–40
–
Ω
USBCLK Clock Output (Lump Capacitance Test Load = 20 pF, VDDC =2.5V)
Parameter
Description
Test Condition/Comments
CPU = 66/100 MHz
Unit
Min.
Typ.
Max.
tR
Output Rise Edge Rate
Measured from 0.4V to 2.0
0.5
–
2
V/ns
tF
Output Fall Edge Rate
Measured from 2.0V to 0.4V
0.5
–
2
V/ns
tD
Duty Cycle
Measured on rising and falling edge at 1.25V
45
–
55
%
tJL
Jitter, Long term
Measured on rising edge at 1.25V. Maximum
difference of cycle time between two adjacent
cycles.
–
–
500
tJC
Jitter, Cycle-to-Cycle
Measured on rising edge at 1.25V. Maximum
difference of cycle time between two adjacent
cycles.
–
–
400
fST
Frequency Stabilization
from Power-up (cold start)
Assumes full supply voltage reached within
1 ms from power-up. Short cycles exist prior to
frequency stabilization.
––3
ms
Zo
AC Output Impedance
Average value during switching transition. Used
for determining series termination value.
–40–
Ω
Ordering Information
Ordering Code
Package Type
Temperature Grade
Standard
CY24242PVC
28-pin SSOP (300 mils)
C (Commercial 0 - 70°)
CY24242PVCT
28-pin SSOP (300 mils) - Tape and Reel
C (Commercial 0 - 70°)
Lead-free
CY24242OXC
28-pin SSOP (300 mils)
C (Commercial 0 - 70°)
CY24242OXCT
28-pin SSOP (300 mils) - Tape and Reel
C (Commercial 0 - 70°)