ST7263BDx datasheet(30/186 Pages) STMICROELECTRONICS

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Central processing unit

ST7263Bxx

30/186

Doc ID 7516 Rev 8

Stack Pointer (SP)

Reset value: 017Fh

The Stack Pointer is a 16-bit register which is always pointing to the next free location in the

stack. It is then decremented after data has been pushed onto the stack and incremented

before data is popped from the stack (see Figure 10).

Since the stack is 128 bytes deep, the 9 most significant bits are forced by hardware.

Following an MCU Reset, or after a Reset Stack Pointer instruction (RSP), the Stack Pointer

contains its reset value (the SP6 to SP0 bits are set) which is the stack higher address.

The least significant byte of the Stack Pointer (called S) can be directly accessed by a LD

instruction.

Note:

When the lower limit is exceeded, the Stack Pointer wraps around to the stack upper limit,

without indicating the stack overflow. The previously stored information is then overwritten

and therefore lost. The stack also wraps in case of an underflow.

The stack is used to save the return address during a subroutine call and the CPU context

during an interrupt. The user may also directly manipulate the stack by means of the PUSH

and POP instructions. In the case of an interrupt, the PCL is stored at the first location

Bit 2 N Negative

This bit is set and cleared by hardware. It is representative of the result sign of the

last arithmetic, logical or data manipulation. It is a copy of the 7th bit of the result.

0: The result of the last operation is positive or null.

1: The result of the last operation is negative (that is, the most significant bit is a

logic 1).

This bit is accessed by the JRMI and JRPL instructions.

Bit 1 Z Zero

This bit is set and cleared by hardware. This bit indicates that the result of the last

arithmetic, logical or data manipulation is zero.

0: The result of the last operation is different from zero.

1: The result of the last operation is zero.

This bit is accessed by the JREQ and JRNE test instructions.

Bit 0 C Carry/borrow

This bit is set and cleared by hardware and software. It indicates an overflow or an

underflow has occurred during the last arithmetic operation.

0: No overflow or underflow has occurred.

1: An overflow or underflow has occurred.

This bit is driven by the SCF and RCF instructions and tested by the JRC and

JRNC instructions. It is also affected by the “bit test and branch”, shift and rotate

instructions.

SP6

SP5

SP4

SP3

SP2

SP1

SP0

Read/write

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