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ST7263BDx 데이터시트(PDF) 38 Page - STMicroelectronics

부품명 ST7263BDx
상세설명  Low speed USB 8-bit MCU family with up to 32 KB Flash/ROM, DFU capability, 8-bit ADC, WDG, timer, SCI and I²C
PDF  186 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
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ST7263BDx 데이터시트(HTML) 38 Page - STMicroelectronics

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Interrupts
ST7263Bxx
38/186
Doc ID 7516 Rev 8
Peripheral interrupts
Different peripheral interrupt flags in the status register are able to cause an interrupt when
they are active if both:
●
The I bit of the CC register is cleared.
●
The corresponding enable bit is set in the control register.
If any of these two conditions is false, the interrupt is latched and thus remains pending.
Clearing an interrupt request is done by one of the two following operations:
●
Writing “0” to the corresponding bit in the status register.
●
Accessing the status register while the flag is set followed by a read or write of an
associated register.
Note:
1
The clearing sequence resets the internal latch. A pending interrupt (i.e. waiting to be
enabled) will therefore be lost if the clear sequence is executed.
2
All interrupts allow the processor to leave the Wait low power mode.
3
Exit from Halt mode may only be triggered by an external interrupt on one of the ITi ports
(PA4-PA7 and PB4-PB7), an end suspend mode interrupt coming from USB peripheral, or a
reset.
Figure 19.
Interrupt processing flowchart
BIT I SET
Y
N
IRET
Y
N
FROM RESET
LOAD PC FROM INTERRUPT VECTOR
STACK PC, X, A, CC
SET I BIT
FETCH NEXT INSTRUCTION
EXECUTE INSTRUCTION
THIS CLEARS I BIT BY DEFAULT
RESTORE PC, X, A, CC FROM STACK
INTERRUPT
Y
N



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