ST7263BEX datasheet(50/186 Pages) STMICROELECTRONICS

50 / 186 page

I/O ports

ST7263Bxx

50/186

Doc ID 7516 Rev 8

9.3.4

Port D

9.3.5

DATA registers (PxDR)

Address

Port A Data register (PADR): 0000h

Port B Data register (PBDR): 0002h

Port C Data register (PCDR): 0004h

Port D Data register (PDDR): 0006h

Reset value

Port A: 0000 0000 (00h)

Port B: 0000 0000 (00h)

Port C: 1111 x000 (FXh)

Port D: 0000 0000 (00h)

Note:

For Port C, unused bits (7-3) are not accessible.

The DR register has a specific behavior according to the selected input/output configuration.

Writing the DR register is always taken into account even if the pin is configured as an input.

Reading the DR register returns either the DR register latch content (pin configured as

output) or the digital value applied to the I/O pin (pin configured as input).

Note:

When using open-drain I/Os in output configuration, the value read in DR is the digital value

applied to the I/Opin.

Table 15.

Port D description

Port D

I / O

Alternate function

Input(1)

Output

Signal

Condition

PD0

without pull-up

push-pull

Analog input (ADC)

CH[3:0] = 1000

(ADCCSR)

PD1

without pull-up

push-pull

Analog input (ADC)

CH[3:0] = 1001

(ADCCSR)

PD2

without pull-up

push-pull

Analog input (ADC)

CH[3:0] = 1010

(ADCCSR)

PD3

without pull-up

push-pull

Analog input (ADC)

CH[3:0] = 1011

(ADCCSR)

PD4

with pull-up

push-pull

PD5

with pull-up

push-pull

PD6

with pull-up

push-pull

PD7

with pull-up

push-pull

Reset state

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