 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
STM8L151C4 데이터시트(PDF) 88 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
STM8L151C4 데이터시트(HTML) 88 Page - STMicroelectronics |
|
|
88 / 101 page  Electrical parameters STM8L151xx, STM8L152xx 88/101 Doc ID 15962 Rev 2 General PCB design guidelines Power supply decoupling should be performed as shown in Figure 19 or Figure 20, depending on whether VREF+ is connected to VDDA or not. Good quality ceramic 10 nF capacitors should be used. They should be placed as close as possible to the chip. Figure 19. Power supply and reference decoupling (VREF+ not connected to VDDA) Table 47. ADC1 accuracy Symbol Parameter Typ Max(1) Unit DNL Differential non linearity TBD ± 1 LSB INL Integral non linearity TBD ± 2 LSB TUE Total unadjusted error TBD ± 5 LSB Offset Offset error TBD ± 2 LSB Gain Gain error TBD ± 3.5 LSB ENOB Effective number of bits TBD ± 9.5 Bits SINAD Signal-to-noise and distortion ratio TBD TBD dB SNR Signal-to-noise ratio TBD TBD dB THD Total harmonic distorsion TBD TBD dB 1. Data based on characterization, not tested in production. V REF+ STM8L V DDA V SSA/V REF- 1 µF // 10 nF 1 µF // 10 nF ai17031 |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
