STM32F107RB datasheet(21/95 Pages) STMICROELECTRONICS

21 / 95 page

STM32F105xx, STM32F107xx

Description

Doc ID 15274 Rev 4

21/95

2.3.24

Remap capability

This feature allows the use of a maximum number of peripherals in a given application.

Indeed, alternate functions are available not only on the default pins but also on other

specific pins onto which they are remappable. This has the advantage of making board

design and port usage much more flexible.

For details refer to Table 5: Pin definitions; it shows the list of remappable alternate functions

and the pins onto which they can be remapped. See the STM32F10xxx reference manual

for software considerations.

2.3.25

ADCs (analog-to-digital converters)

Two 12-bit analog-to-digital converters are embedded into STM32F105xx and

STM32F107xx connectivity line devices and each ADC shares up to 16 external channels,

performing conversions in single-shot or scan modes. In scan mode, automatic conversion

is performed on a selected group of analog inputs.

Additional logic functions embedded in the ADC interface allow:

Simultaneous sample and hold

Interleaved sample and hold

Single shunt

The ADC can be served by the DMA controller.

An analog watchdog feature allows very precise monitoring of the converted voltage of one,

some or all selected channels. An interrupt is generated when the converted voltage is

outside the programmed thresholds.

The events generated by the standard timers (TIMx) and the advanced-control timer (TIM1)

can be internally connected to the ADC start trigger and injection trigger, respectively, to

allow the application to synchronize A/D conversion and timers.

2.3.26

DAC (digital-to-analog converter)

The two 12-bit buffered DAC channels can be used to convert two digital signals into two

analog voltage signal outputs. The chosen design structure is composed of integrated

resistor strings and an amplifier in inverting configuration.

This dual digital Interface supports the following features:

two DAC converters: one for each output channel

8-bit or 12-bit monotonic output

left or right data alignment in 12-bit mode

synchronized update capability

noise-wave generation

triangular-wave generation

dual DAC channel independent or simultaneous conversions

DMA capability for each channel

external triggers for conversion

input voltage reference VREF+

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