56F8167 datasheet(149/182 Pages) FREESCALE

149 / 182 page

External Memory Interface Timing

56F8367 Technical Data, Rev. 9

Freescale Semiconductor

149

Preliminary

10.8 External Memory Interface Timing

The External Memory Interface is designed to access static memory and peripheral devices. Figure 10-5

shows sample timing and parameters that are detailed in Table 10-16.

The timing of each parameter consists of both a fixed delay portion and a clock related portion, as well as

user controlled wait states. The equation:

t = D + P * (M + W)

should be used to determine the actual time of each parameter. The terms in this equation are defined as:

When using the XTAL clock input directly as the chip clock without prescaling (ZSRC selects prescaler

clock and prescaler set to ÷ 1), the EMI quadrature clock is generated using both edges of the EXTAL clock

input. In this situation only, parameter values must be adjusted for the duty cycle at XTAL. DCAOE and

DCAEO are used to make this duty cycle adjustment where needed.

DCAOE and DCAEO are calculated as follows:

The timing of write cycles is different when WWS = 0 than when WWS > 0. Therefore, some parameters

contain two sets of numbers to account for this difference. Use the “Wait States Configuration” column

of Table 10-16 to make the appropriate selection.

Quiescent Current, power-down mode

IPD

—0

μA

= Parameter delay time

= Fixed portion of the delay, due to on-chip path delays

= Period of the system clock, which determines the execution rate of the part

(i.e., when the device is operating at 60MHz, P = 16.67 ns)

= Fixed portion of a clock period inherent in the design; this number is adjusted to account

for possible derating of clock duty cycle

= Sum of the applicable wait state controls. The “Wait State Controls” column of

Table 10-16 shows the applicable controls for each parameter and the EMI chapter of

the 56F8300 Peripheral User Manual details what each wait state field controls.

DCAOE =

0.5 - MAX XTAL duty cycle, if ZSRC selects prescaler clock and the prescaler is set to

÷ 1

0.0 all other cases

DCAEO =

MIN XTAL duty cycle - 0.5, if ZSRC selects prescaler clock and the prescaler is set to

÷ 1

0.0 all other cases

Example of DCAOE and DCAEO calculation:

Assuming prescaler is set for

÷ 1 and prescaler clock is selected by ZSRC, if XTAL duty cycle

ranges between 45% and 60% high;

DCAOE = .50 - .60 = - 0.1

DCAEO = .45 - .50 = - 0.05

Table 10-15 Crystal Oscillator Parameters

Characteristic

Symbol

Min

Typ

Max

Unit

56F8167 데이터시트(PDF) 149 Page - Freescale Semiconductor, Inc

56F8167 데이터시트(HTML) 149 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL