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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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ATmega128 데이터시트(PDF) 314 Page - ATMEL Corporation |
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ATmega128 데이터시트(HTML) 314 Page - ATMEL Corporation |
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314 / 386 page  314 2467S–AVR–07/09 ATmega128 Figure 150. Virtual Flash Page Load Register Virtual Flash Page Read Register The Virtual Flash Page Read Register is a virtual scan chain with length equal to the number of bits in one Flash page plus 8. Internally the Shift Register is 8-bit, and the data are automatically transferred from the Flash data page byte by byte. The first eight cycles are used to transfer the first byte to the internal Shift Register, and the bits that are shifted out during these 8 cycles should be ignored. Following this initialization, data are shifted out starting with the LSB of the first instruction in the page and ending with the MSB of the last instruction in the page. This pro- vides an efficient way to read one full Flash page to verify programming. Figure 151. Virtual Flash Page Read Register Programming Algorithm All references below of type “1a”, “1b”, and so on, refer to Table 130. TDI TDO D A T A Flash EEPROM Fuses Lock Bits STROBES ADDRESS State machine TDI TDO D A T A Flash EEPROM Fuses Lock Bits STROBES ADDRESS State machine |
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