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AT89LP4052 데이터시트(PDF) 77 Page - ATMEL Corporation

부품명 AT89LP4052
상세설명  8-bit Microcontroller with 2/4-Kbyte Flash
PDF  94 Pages
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제조업체  ATMEL [ATMEL Corporation]
홈페이지  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT89LP4052 데이터시트(HTML) 77 Page - ATMEL Corporation

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77
3547J–MICRO–10/09
AT89LP2052/LP4052
23.5.6
ISP Command Sequence
The ISP multi-byte command sequence is shown in Figure 23-27.
•SS should be brought low before the first byte in a command is sent and brought back high
after the final byte in the command has been sent. The command is not complete until SS
returns high.
• Command bytes are issued serially on MOSI (P1.5).
• Data bytes are output serially on MISO (P1.6).
Figure 23-27. ISP Command Sequence
70
654321
7
0
654321
7
0
654321
7
0
654321
70
654321
SS
SCK
MOSI
MISO
Preamble
Opcode
Address High
Address Low
Data In
Data Out
X
X
X
X
Table 23-4.
Serial Programming Interface Parameters
Symbol
Parameter
Min
Max
Units
tSCK
Serial Clock Cycle Time
200
ns
t
SHSL
Clock High Time
100
ns
t
SLSH
Clock Low Time
50
ns
tSR
Rise Time
25
ns
t
SF
Fall Time
25
ns
t
SIS
Serial Input Setup Time
10
ns
tSIH
Serial Input Hold Time
10
ns
t
SOH
Serial Output Hold Time
10
ns
t
SOV
Serial Output Valid Time
35
ns
tSOE
Output Enable Time
10
ns
t
SOX
Output Disable Time
25
ns
t
SSE
SS Enable Lead Time
100
ns
tSSD
SS Disable Lag Time
100
ns
t
WRC
Wire Cycle Time
4.5
ms
t
ERS
Erase Cycle Time
9
ms



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