ATtiny24-20SSU datasheet(26/236 Pages) ATMEL

26 / 236 page

8006H–AVR–10/09

ATtiny24/44/84

6.2.1

External Clock

To drive the device from an external clock source, CLKI should be driven as shown in Figure 6-2

on page 26. To run the device on an external clock, the CKSEL Fuses must be programmed to

“0000”.

Figure 6-2.

External Clock Drive Configuration

When this clock source is selected, start-up times are determined by the SUT Fuses as shown in

Table 6-3.

When applying an external clock, it is required to avoid sudden changes in the applied clock fre-

quency to ensure stable operation of the MCU. A variation in frequency of more than 2% from

one clock cycle to the next can lead to unpredictable behavior. It is required to ensure that the

MCU is kept in Reset during such changes in the clock frequency.

Note that the System Clock Prescaler can be used to implement run-time changes of the internal

clock frequency while still ensuring stable operation. See “System Clock Prescaler” on page 30

for details.

6.2.2

Calibrated Internal 8 MHz Oscillator

By default, the Internal Oscillator provides an approximate 8 MHz clock. Though voltage and

temperature dependent, this clock can be very accurately calibrated by the user. See Table 20-2

on page 176 and “Internal Oscillator Speed” on page 205 for more details. The device is shipped

with the CKDIV8 Fuse programmed. See “System Clock Prescaler” on page 30 for more details.

This clock may be selected as the system clock by programming the CKSEL Fuses as shown in

Table 6-4. If selected, it will operate with no external components. During reset, hardware loads

the pre-programmed calibration value into the OSCCAL Register and thereby automatically cal-

Table 6-3.

Start-up Times for the External Clock Selection

SUT1..0

Start-up Time

from Power-down

Additional Delay

from Reset

Recommended

Usage

6 CK

14CK

BOD enabled

6 CK

14CK + 4 ms

Fast rising power

6 CK

14CK + 64 ms

Slowly rising power

Reserved

EXTERNAL

CLOCK

SIGNAL

CLKI

GND

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